Assistant professor at Shah and Anchor Kutchhi Engineering College, India
Dr. Dibyalekha Nayak is a dedicated academician and emerging researcher with deep expertise in image processing, adaptive compression, and VLSI design. Her professional journey is marked by a strong commitment to teaching, scholarly research, and technological advancement. With over a decade of teaching experience and a recently completed Ph.D. from KIIT University, Bhubaneswar, her research has produced several publications in SCI-indexed journals and international conferences. Dr. Nayak’s contributions reflect an interdisciplinary approach, combining deep learning techniques with low-power hardware design to address complex challenges in wireless sensor networks and multimedia systems. She has actively participated in faculty development programs and technical workshops, continuously upgrading her knowledge. Her professional philosophy emphasizes ethics, hard work, and continuous learning. Currently serving as an Assistant Professor at Shah and Anchor Kutchi Engineering College in Mumbai, she aspires to make impactful contributions to the field of electronics and communication through research, innovation, and collaboration.
Professional Profile
Education🎓
Dr. Dibyalekha Nayak holds a Ph.D. in Image Processing from the School of Electronics at KIIT University, Bhubaneswar, where she completed her research between September 2018 and May 2024. Her doctoral work focused on advanced techniques in image compression and saliency detection using deep learning and compressive sensing. She completed her Master of Technology (M.Tech) in VLSI Design from Satyabhama University, Chennai, in 2011, graduating with a commendable CGPA of 8.33. Prior to that, she earned her Bachelor of Engineering (B.E.) in Electronics and Telecommunication from Biju Patnaik University of Technology (BPUT), Odisha, in 2008, with a CGPA of 6.5. Her academic background provides a strong foundation in both theoretical electronics and practical applications in image processing and circuit design. The combination of image processing and VLSI design throughout her academic journey has enabled her to engage in cross-disciplinary research and foster innovation in both hardware and software domains.
Professional Experience📝
Dr. Dibyalekha Nayak has accumulated over 12 years of rich academic experience in various reputed engineering institutions across India. Currently, she serves as an Assistant Professor at Shah and Anchor Kutchi Engineering College, Mumbai, affiliated with Mumbai University, where she joined in July 2024. Prior to this, she worked as a Research Scholar at KIIT University (2018–2024), contributing significantly to image processing research. Her earlier roles include Assistant Professor positions at institutions such as College of Engineering Bhubaneswar (2016–2018), SIES Graduate School of Technology, Mumbai (2014), St. Francis Institute of Technology, Mumbai (2013), and Madha Engineering College, Chennai (2011–2012). Across these roles, she has taught a variety of undergraduate and postgraduate courses, supervised student projects, and contributed to departmental development. Her teaching areas span digital electronics, VLSI design, image processing, and communication systems, demonstrating a strong alignment between her teaching and research activities.
Research Interest🔎
Dr. Dibyalekha Nayak’s research interests lie at the intersection of image processing, deep learning, and VLSI design, with a special focus on adaptive compression, saliency detection, and compressive sensing. Her doctoral research addressed the development of innovative, low-complexity algorithms for image compression using techniques like block truncation coding and DCT, tailored for wireless sensor network applications. She is also deeply interested in integrating deep learning frameworks into image enhancement and compression tasks to improve performance in real-world environments. Additionally, her background in VLSI design supports her interest in low-power hardware architectures for efficient implementation of image processing algorithms. Dr. Nayak is particularly motivated by research problems that bridge the gap between theoretical innovation and practical implementation, especially in the fields of embedded systems and multimedia communication. Her interdisciplinary research aims to create scalable, energy-efficient, and intelligent solutions for future communication and sensing technologies.
Award and Honor🏆
While Dr. Dibyalekha Nayak’s profile does not explicitly mention formal awards or honors, her scholarly achievements speak volumes about her academic excellence and dedication. She has published multiple research articles in prestigious SCI and Web of Science indexed journals such as Multimedia Tools and Applications, Mathematics, and Computers, reflecting the quality and impact of her research. She has been actively involved in reputed international conferences including IEEE and Springer Lecture Notes, where she has presented and published her research findings. Her work on saliency-based image compression and fuzzy rule-based adaptive block compressive sensing has received commendation for its innovation and applicability. Furthermore, her selection and sustained work as a Research Scholar at KIIT University for over five years highlights the recognition she has earned within academic circles. Her consistent participation in technical workshops, faculty development programs, and collaborations also demonstrate her growing reputation and standing in the field of electronics and image processing.
Research Skill🔬
Dr. Dibyalekha Nayak possesses a versatile and robust set of research skills aligned with modern-day challenges in image processing and electronics. She is proficient in developing image compression algorithms, saliency detection models, and adaptive techniques using block truncation coding, fuzzy logic, and DCT-based quantization. Her technical expertise extends to deep learning architectures tailored for image enhancement and compressive sensing in wireless sensor networks. Additionally, she has a strong command of VLSI design methodologies, enabling her to work on low-power circuit design and hardware implementation strategies. Dr. Nayak is also skilled in scientific programming, using tools such as MATLAB and Python, along with LaTeX for research documentation. She has a clear understanding of research methodologies, simulation frameworks, and performance analysis metrics. Her experience in preparing manuscripts for SCI-indexed journals and conference presentations showcases her technical writing abilities. Overall, her analytical mindset and hands-on skills make her a competent and impactful researcher.
Conclusion💡
Dr. Dibyalekha Nayak is a highly dedicated and emerging researcher in the fields of Image Processing, Deep Learning, and VLSI. Her academic journey reflects perseverance, scholarly depth, and a clear focus on impactful research. Her SCI-indexed publications, teaching experience, and cross-domain knowledge make her a deserving candidate for the Best Researcher Award.
Publications Top Noted✍
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Title: Fuzzy Rule Based Adaptive Block Compressive Sensing for WSN Application
Authors: D. Nayak, K. Ray, T. Kar, S.N. Mohanty
Journal: Mathematics, Volume 11, Issue 7, Article 1660
Year: 2023
Citations: 6
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Title: A novel saliency based image compression algorithm using low complexity block truncation coding
Authors: D. Nayak, K.B. Ray, T. Kar, C. Kwan
Journal: Multimedia Tools and Applications, Volume 82, Issue 30, Pages 47367–47385
Year: 2023
Citations: 4
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Title: Walsh–Hadamard Kernel Feature-Based Image Compression Using DCT with Bi-Level Quantization
Authors: D. Nayak, K. Ray, T. Kar, C. Kwan
Journal: Computers, Volume 11, Issue 7, Article 110
Year: 2022
Citations: 3
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Title: Sparsity based Adaptive BCS color image compression for IoT and WSN Application
Authors: D. Nayak, T. Kar, K. Ray
Journal: Signal, Image and Video Processing, Volume 19, Issue 8, Pages 1–7
Year: 2025
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Title: Hybrid Image Compression Using DCT and Autoencoder
Authors: D. Nayak, T. Kar, K. Ray, J.V.R. Ravindra, S.N. Mohanty
Conference: 2024 IEEE Pune Section International Conference (PuneCon), Pages 1–6
Year: 2024
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Title: Performance Comparison of Different CS based Reconstruction Methods for WSN Application
Authors: D. Nayak, K.B. Ray, T. Kar
Conference: 2021 IEEE 2nd International Conference on Applied Electromagnetics, Signal Processing, & Communication (AESPC)
Year: 2021
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Title: A Comparative Analysis of BTC Variants
Authors: D. Nayak, K.B. Ray, T. Kar
Conference: Proceedings of International Conference on Communication, Circuits, and Systems (LNEE, Springer)
Year: 2021
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Title: Low Power Error Detector Design by using Low Power Flip Flops Logic
Authors: D. Chaini, P. Malgi, S. Lopes
Journal: International Journal of Computer Applications, ISSN 0975-8887
Year: 2014